xmx

Intel XeSS XMX kernels translated to run on AMD RDNA3/RDNA4 WMMA under Linux/Proton.

Per-precision XMX (matrix engine) profiling for Intel Arc GPUs via Level Zero metric streamers — observes any workload without wrapping it

Static reverse engineering of the AMD DLSS NR module (dlssnr_amd_pass1.dll) - kernel parameter spec, weight container format, and an Intel XMX porting feasibility assessment targeting Xe-HPG/Xe2 and later. Three open gaps; help wanted.

Attention and multi-GPU work for the Intel Arc A770 (Xe-HPG) in SYCL, for llama.cpp. Sibling of volta-fa.

Boltz-2 on Intel Arc — NVIDIA-free protein folding + binding affinity (AlphaFold3-class) via torch.xpu.

Native Intel Xe2 LLM inference: SYCL/DPAS kernels, paged KV, prefix caching, continuous batching, and XMX packed prefill

Native, zero-bloat local LLM runner and server purpose-built for Intel Arc GPUs & AI Boost NPUs with dual-silicon speculative decoding and drop-in Ollama/OpenAI API parity.