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feat(validator): commit pending MIG-mode change via targeted GPU reset - #2603

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lexfrei:feat/validator-commit-mig-mode-gpu-reset
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feat(validator): commit pending MIG-mode change via targeted GPU reset#2603
lexfrei wants to merge 1 commit into
NVIDIA:mainfrom
lexfrei:feat/validator-commit-mig-mode-gpu-reset

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@lexfrei

@lexfrei lexfrei commented Jul 4, 2026

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Description

RFC / DRAFT: opening for design feedback before the runtime path is exercised on GPU hardware. See the "Destructive GPU reset, why it is safe here" section below.

On Ampere (A100, A30) enabling MIG mode needs a GPU reset, and the driver tries that reset itself. It doesn't always work: the reset is refused while the GPU is in use, and under passthrough the hypervisor can disallow it. The GPU then sits with mig.mode.pending=Enabled and mig.mode.current not Enabled, so MIG-backed vGPU devices can't be created until something resets it later. Right now that means a hand-rolled host-side step.

This adds an opt-in step to vGPU Manager validation that commits such a pending enable with a targeted nvidia-smi --gpu-reset. It runs before the wait for SR-IOV VFs, since a GPU reset needs SR-IOV disabled first.

What this is not: it does not recreate MIG state lost to a reboot, and it isn't needed for that. MIG mode survives a reboot on Ampere via an InfoROM status bit, and from Hopper on, enabling it no longer needs a reset. MIG instances don't survive on any generation, but recreating those is mig-parted's job.

Destructive GPU reset, why it is safe here

nvidia-smi --gpu-reset tears down anything running on the GPU. The step is off by default and it resets a GPU only when all of these hold:

  • Opt-in. New flag --commit-mig-mode-with-gpu-reset (env COMMIT_MIG_MODE_WITH_GPU_RESET), default false. Unset, behavior is identical to today: no reset, validate() unchanged.
  • vGPU path only. commitMIGMode is reached only from VGPUManager.validate(), which early-returns for non-vm-vgpu workloads.
  • MIG mode requested but not committed: mig.mode.pending == Enabled and mig.mode.current != Enabled. Something else already requested the change; this only commits it, never decides it.
  • No SR-IOV VFs enabled. A GPU reset needs SR-IOV disabled first, and a GPU that still has VFs may have a vGPU VM attached.
  • No running compute processes. This is a fast-path guard. nvidia-smi --gpu-reset refuses to reset a GPU that is in use anyway, which is the real safety net.

In the steady state, MIG already committed or VFs present, it does nothing. Best-effort: reset failures are logged and validation continues, so setups that commit MIG mode out-of-band keep working as before.

On NVSwitch / Fabric Manager systems a single-GPU reset can interact with fabric partition state. This change only commits MIG mode and doesn't manage fabric partitions, which is one of the open design questions for the RFC.

Checklist

  • No secrets, sensitive information, or unrelated changes
  • Lint checks passing (make lint): the changed package is clean, GOOS=linux golangci-lint run ./cmd/nvidia-validator/ reports 0 issues. Repo-wide make lint was not run locally.
  • Generated assets in-sync (make validate-generated-assets): this change adds no API/CRD changes, so no generated assets change; the full target was not run.
  • Go mod artifacts in-sync (make validate-modules)
  • Test cases are added for new code paths

Testing

  • gofmt, go build, go vet, and golangci-lint run on the changed package, cross-compiled GOOS=linux (the validator is a Linux-only binary): clean, 0 issues. No asset or go.mod/go.sum changes.
  • New unit tests run green in a Linux container (go test ./cmd/nvidia-validator/): TestNormalizePCIAddress (nvidia-smi 8-digit vs go-nvlib 4-digit PCI domains normalize to the same key), TestParseMIGModes (CSV parsing, [N/A], malformed rows, the pending-vs-current guard), TestMIGModeNeedsCommit (the enable-only commit predicate across every current/pending combination, including case-insensitivity), and TestShouldResetForMIGCommit (the reset-decision guard matrix over uncommitted-enable, VFs-present and workload-running).
  • Not yet exercised on GPU hardware; the runtime chroot / nvidia-smi --gpu-reset path relies on CI and cluster testing. This is why the PR is opened as a draft/RFC.

Refs #2600.

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@rajathagasthya

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Just linking back to the ongoing discussion at #2600 (comment) (thanks for the additional context there!). Let's revisit this PR once we decide on a direction for #2600.

On the vGPU (sandbox) workload path, a MIG-mode change is not applied until
the GPU is reset, and neither the MIG mode nor the SR-IOV VFs survive a node
reboot. The MIG manager can set MIG mode to Enabled, but committing that change
requires a GPU reset it does not perform (its only reset mechanism reboots the
whole node), so after a reboot MIG-backed vGPU devices cannot be created until
the state is re-established out-of-band by host systemd units.

Add an opt-in step to vGPU Manager validation that commits a pending-but-
uncommitted MIG-mode enable via a targeted 'nvidia-smi --gpu-reset', right
before VFs are waited for. The reset is destructive, so it is tightly gated:
it runs only when explicitly enabled (commit-mig-mode-with-gpu-reset, off by
default), only on the vGPU path, and only on a GPU whose MIG-mode enable is
requested but not yet applied, that has no SR-IOV VFs enabled (no vGPU VM
attached), and that has no running compute processes. In the steady state it
is a no-op. It is best-effort: reset failures are logged and validation
continues, preserving current behavior for setups that commit MIG mode and
create VFs out-of-band.

This complements the SR-IOV VF re-enable seam so MIG-backed vGPU can recover
after a reboot without a hand-rolled host unit. VF re-enablement must run
after this reset (a GPU reset requires SR-IOV to be disabled first).

Assisted-By: Claude <noreply@anthropic.com>
Signed-off-by: Aleksei Sviridkin <f@lex.la>
@lexfrei
lexfrei force-pushed the feat/validator-commit-mig-mode-gpu-reset branch from 7a40a92 to 95e02db Compare August 10, 2026 10:37
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2 participants