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test(dr512): canonical epistemic P×M Codec9 + LUT9/CI tripwires; defer CE64 sidecar - #383

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AdaWorldAPI merged 14 commits into
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fix/dr512-universal-epistemic-presence-tripwire-20261028
Oct 28, 2026
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AdaWorldAPI merged 14 commits into
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fix/dr512-universal-epistemic-presence-tripwire-20261028

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Operator ruling: ONE DR512 epistemic P×M convention

No adapter, alternate sign bit, or spare NULL plane.

P Magnitude Meaning
0 0 -0 / NaN / epistemically NEVER TOUCHED
0 1..255 negative -1..-255
1 0 valid +0
1 1..255 positive +1..+255
  • LUT9 changed to canonical presence polarity. Existing untouched -0 stays -0. A touched negative nonzero result that rounds to 0 becomes valid +0; no (-0.5,0) sentinel filter.
  • Codec9 introduced as lab-only u8 magnitude + one u64 P plane per 64 rows with existing Codec8 compile-time Calibration and nearest Rounding types (TiesEven, TiesAway). Asym, Floor, alternate NULL/sign options cannot redefine P×M. Codec8 itself remains unchanged.
  • Exhaustive 512 codewords + 511² valid pairs and the WHERE(P==0 AND M==0) 65,536-row gate without another 8-KiB mask.
  • Realigned historical palette512_probe, sm9_presence_probe, lut9_bench and the independent SIMD matrix parity reference so no old-sign oracle remains valid unnoticed. Existing SIMD matrix should run the updated P×M oracle on backend realizations.
  • Required CI: new dr512-epistemic-tripwire job in existing ci.yaml, added to mandatory conclusion.needs (independent truth table; Codec9; LUT9; legacy probes).
  • Negative ceiling: touched -0.49999 and -0.4 must be +0; TiesEven -0.5 becomes +0, TiesAway -0.5 becomes -1; always valid numeric results, never NaN.
  • [-a,+b] distance law documented and independently checked in tests/dr512_epistemic_contract.rs: same sign |m1-m2|, opposite sign m1+m2 (up to 510, requires u16), and hypothetical [-3,+7] side-calibrated oracle. No LUT performance claim is made without a pinned benchmark.
  • CausalEdge64 SPO 3-bit sidecar is explicitly DEFERRED. No bit theft from the existing 64-bit law, no physical DR³ change.

Validation status / reviewer gates

Branch is incremental normal commits only, NO FORCE PUSH. Static source/owner review completed; exhaustive test commands are wired in CI, but execution results must be read from Actions after PR creation. No claim that CI has already passed.

Review particularly the semantics of touched across source and numeric operations, source/version authority, all backend parity, and the distinction between numeric P×M vs arbitrary Odoo/OGIT codebook identities. This PR is a contained ndarray experimental numerical + test gate, not a BGZ/Quack/Odoo wire migration.

Source context: ndarray #380–#382, lance-graph #1819/#1823, EXO-50 (append-only cross-session board). Rejected LG #1812 is strictly quarantined, not technical evidence.

Run

cargo test --test dr512_epistemic_contract
cargo test --lib hpc::codec9::tests
cargo test --lib simd_stride::tests::lut9
cargo test --example palette512_probe
cargo test --example sm9_presence_probe

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AdaWorldAPI marked this pull request as ready for review October 28, 2026 00:13
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`main` in sm9_presence_probe now counts NULL rows with `never_touched`,
so `decode` is used only by the example's tests and `-D warnings`
rejected it as dead code in three jobs. Gate it with #[cfg(test)].
`cargo fmt` reflows four lines in the files this PR touches.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01XAqKMPWTwovjYJEUMuGPb4
@AdaWorldAPI
AdaWorldAPI merged commit 2cbe131 into master Oct 28, 2026
31 checks passed
AdaWorldAPI pushed a commit that referenced this pull request Oct 29, 2026
…otes

facet-stride-guard --all crashed on the 34 crates/burn/src/*.rs paths,
which are symlinks into an absent ../upstream checkout. The --diff and
--hook modes already skipped non-files; --all now does too. The count
is unchanged (166).

wasm-simd-consumer-guide said wasm mul_add rounds twice; since #374/#378
it rounds once on every realization and is checked bit for bit, so a
mul_add parity test may assert equality.

The NaN mindmap plan records #383: on integer lanes one presence/polarity
bit replaces #381's two planes, and float presence of a DR512 lane is
P | ne_u8_to_mask(M, 0).

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01XAqKMPh2Seh2WLccCksAdY
AdaWorldAPI pushed a commit that referenced this pull request Oct 29, 2026
-#383

Point-by-point revision of lance-graph's 2026-10-16 synergy map (A-F,
X1-X19, D1-D8, S1-S8, L/H/V), each row re-read against current main.
Closes X11, D1, S4, S8; marks X2-X4 UNKNOWN; merges X16 with the
facet-stride lance-graph hits. Adds N1-N9 for the codec9/lut9
consumers, the NSL runtime-scale request, the AVX2 popcount question
and the remaining NaN erasers, plus the Haiku harvest ledger.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01XAqKMPh2Seh2WLccCksAdY
AdaWorldAPI added a commit that referenced this pull request Oct 29, 2026
Synergy map after #378–#383; guard symlink fix; stale mul_add doc
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