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Bump HRX: llama.cpp 40c4ccb76e48 + hrx-system 82804197bcbe - #610
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PR Reviewer Guide 🔍(Review updated until commit bc8ee93)Here are some key observations to aid the review process:
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Triage (CPU box What the diff is — two hunks: Checks — Risk, one sentence: it moves the kernel tree the leaderboard cites — it adds Not merging this one myself — it moves the pin, which is your call. Recommendation in the triage brief: merge after the current Provenance gap worth fixing in the same motion (found while checking the pin): |
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Persistent review updated to latest commit 8e47d7b |
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Persistent review updated to latest commit 7ad3446 |
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Persistent review updated to latest commit 1fc4dfe |
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Persistent review updated to latest commit bc8ee93 |
Moves the HRX submodules along our line. AMD's tested pair (ROCm/ggml-staging-automation) is llama.cpp
1ec5a7a69da5+ hrx-system5f4dfc8731a1; the workflow merges it into our branches (a conflict fails the run and names the files).e7e5cd08f9bb40c4ccb76e4882804197bcbe82804197bcbehrx-system HELD at
82804197bcbebyconfig/hrx-system-hold.config(AMD's tested pin is5f4dfc8731a1).llama.cpp commits new to the engine:
40c4ccb76hrx: translate add-on kernel names through a weak hook before scanning a code object (moe_trace: create the trace file 0644 and fail if it cannot be written #153)15a46404ellama-graph: make norm inputs contiguous for qwen4exp only (qwen35 one-token decode back on the fused GDN kernel) (Fix CodeQL alerts: size_t index math in the Laya scorer, read-only token for ci #152)8c0ab23a6tests: qwen_matmul_dispatch runs to the end at the pin (engine hrx-backend-test: 49 host cases red after the AMD-core re-head — classification (stale expectation vs needs a ruling) #445) (third_party: bump llama.cpp pin for the HRX decode-split multipass fix (engine#115) #151)6b397ee90tests: the packing case pins the guarded packer, both arms measured (engine hrx: disjoint transients no longer share an arena slot (arena 256 -> 512 on the same plan) #534) (Zyphra ZAYA1-VL-8B (pin llama.cpp f30cc43), Zamba2-VL template fix (pin llama.cpp-vulkan 4a2c0656) #149)8ee20a088hrx: refuse a dispatch match that reads a value before it is written (engine hrx-backend-test: two fused plans fail the command-program verifier (transient read before write) #533, hrx: fusion must withdraw dispatches it makes redundant (reader emitted before the fused writer, engine #533) #570) (serve: --moe-slots streams MoE experts from the drive (Vulkan) #150)adef66c17tests: keep the FILL constant in snapshots, and bring both HRX suites to the pin (engine HRX: hrx-backend-test and test-hrx-ops abort on stale kernel-routing expectations #444, hrx-backend-test: 49 host cases red after the AMD-core re-head — classification (stale expectation vs needs a ruling) #445) (serve: --device hrx decodes without decode-split flash attention by default (#140) #148)6ded110b5qwen4exp/ternary: TQ2_0 load-time repack onto the fast k128 ternary decode kernel (BitNet b1.58 on HRX) (Discussions are open #147)21a2822e4cli: -no-cnv means one turn, and a non-TTY stdin ends the interactive loop (engine#561) (actions: bump actions/checkout from 4.4.0 to 7.0.1 #145)CI here builds without HRX. Before merging, on Strix Halo run the long-prompt correctness
probe and
test-backend-ops -b HRX0; record the exact validated hrx-system pin inconfig/hrx-long-prompt-validated-pin.config:python3 tests/hrx_long_prompt.pycmake -B build -G Ninja -DONEBIT_HRX=ON && cmake --build build --target onebit && for d in hrx cpu; do tests/serve_e2e.sh build/1bit <Qwen3-0.6B Q4_K_M .gguf> $d; done